Low voltage multi-junction vertical cavity surface emitting laser

ABSTRACT

An optical device with a wavelength of operation, the device comprising a light emitting region which emits light at the wavelength of operation, the light emitting region including an active region and a contact region of a first conductivity type and a second conductivity type wherein the light emitting region is positioned within an optical gain cavity which includes a mirror and an opposed mirror and a substrate solder bonded using a bonding layer to at least one of the mirror and the opposed mirror.

FIELD OF THE INVENTION

This invention relates to lasers.

More particularly, the present invention relates to semiconductor lasersthat generate relatively long wavelengths.

BACKGROUND OF THE INVENTION

Vertical cavity surface emitting lasers (hereinafter referred to as“VCSEL's”) have become the dominant light source for opticaltransmitters used in short-reach local area networks and storage areanetwork applications, in which a multi-mode optical fiber is used fordata transmission. VCSEL's are low cost micro-cavity devices with highspeed, low drive current and low power dissipation, with desirable beamproperties that significantly simplify their optical packaging andtesting. In order to extend the application of VCSEL's to opticalnetworks with a longer reach, e.g., in Metropolitan Area Networks thatare based on single-mode optical fibers, a long wavelength VCSEL isneeded that can emit sufficiently high single mode output power in the1.3 μm to 1.5 μm wavelength range.

The simultaneous requirement of high power and single mode lasingoperation create an inherent contradiction in the VCSEL design. Whereashigh power requires a large effective gain volume, single mode operationmandates a smaller active area that is typically less than 5 μm in crosssection. This contradiction may be resolved by increasing thelongitudinal extent of the gain volume while restricting its lateralarea, but in practice this approach is limited by the diffusion lengthsof the injected electrical carriers, which limit the thickness of thegain volume. This, along with the stronger temperature dependence of thelasing mode and the gain peak at longer wavelengths, has effectivelylimited the maximum single mode output power of a long wavelength VCSELto 1 mW or less before the onset of thermal roll-over.

The use of multiple quantum well stacks arranged in a resonant gainconfiguration (with the quantum wells located at the anti-nodes) cangreatly increase the gain volume and total optical of the VCSEL, but inpractice this is limited by carrier diffusion to a single MQW stack. Oneapproach for circumventing the carrier diffusion limit is toelectrically cascade successive pn junctions formed by embeddingindividual gain regions (MQW stacks) between p-doped and n-doped contactlayers. The successive pn junctions are electrically “shorted” and thusserially connected by means of Esaki tunnel junctions connectingneighboring p⁺-doped and n⁺-doped contact layers. While this approachcan result in a higher optical output and differential slopeefficiencies that exceed 100%, its principal drawback is the additivenature of the junction voltages, which require the use of high voltagedrivers that are not readily available at high modulation speeds.

It would be highly advantageous, therefore, to remedy the foregoing andother deficiencies inherent in the prior art.

Accordingly, it is an object of the present invention to provide a newand improved method of fabricating an electrically pumped longwavelength vertical cavity surface emitting laser.

It is an object of the present invention to provide a new and improvedmethod of fabricating an electrically pumped long wavelength verticalcavity surface emitting laser which operates at lower power.

It is another object of the present invention to provide a new andimproved method of fabricating an electrically pumped long wavelengthvertical cavity surface emitting laser which has improved light emissionproperties.

It is another object of the present invention to provide a new andimproved method of fabricating an electrically pumped long wavelengthvertical cavity surface emitting laser which generates less heat.

It is still another object of the present invention to provide a newmethod of improving the temperature performance of an electricallypumped long wavelength vertical cavity surface emitting laser which hasa reduced temperature dependence.

SUMMARY OF THE INVENTION

To achieve the objects and advantages specified above and others, amethod of fabricating a multi-junction vertical cavity surface emittinglaser with a wavelength of operation is disclosed. The method comprisesthe steps of providing a first substrate onto which at least one lightemitting region is epitaxially grown. In the preferred embodiment, thefirst substrate includes indium phosphide (InP). However, it will beunderstood that the first substrate can include other materials whichcan be lattice matched to subsequent layers grown thereon.

The light emitting region includes an active region with a plurality ofquantum structure layers which substantially emit light at thewavelength of operation. In the preferred embodiment, each adjacentquantum structure layer in the active region is spaced apart by adistance approximately equal to an integer multiple of one-half thewavelength of operation.

Further, each light emitting region is separated from each adjacentlight emitting region by alternate contact regions of a firstconductivity type and a second conductivity type so that each lightemitting region can be electrically biased in parallel. In the preferredembodiment, the first conductivity type is opposite in conductivity tothe second conductivity type such that each at least one light emittingregion is sandwiched between contact regions of opposite conductivitytypes (i.e. n-type and p-type regions to form a pn junction).

A first stack of alternate layers of a first material and a secondmaterial is epitaxially grown on the light emitting region wherein thefirst stack of alternate layers form a distributed Bragg reflector(hereinafter referred to as “DBR”). A second substrate is bonded to thefirst stack of alternate layers and the first substrate is removed bylapping or a similar technique to substantially expose the lightemitting region. In the preferred embodiment, the second substrateincludes indium phosphide (InP). However, it will be understood that thesecond substrate can include other materials with suitable thermallyconductive properties such as gallium arsenide (GaAs), silicon (Si), orthe like. The second substrate can be bonded using a bonding layer of asolder material, for example, or another suitable material with thedesired properties for adhesion. In some embodiments, the bonding layercan include a window to allow a substantial light emission through thesecond substrate.

A second stack of alternate layers of a third material and a fourthmaterial is epitaxially grown on the at least one light emitting regionto form a DBR. In the preferred embodiment, the third and fourthmaterials include a high index of refraction material, such as magnesiumfluoride (MgF) and zinc selenide (ZnSe), respectively, to form adielectric DBR. However, the first, second third, and fourth materiallayers can include other materials, such as alloys of AlGaAs, siliconoxide (SiO), titanium oxide (TiO), or the like. Further, the first,second third, and fourth material layers each have a thicknessapproximately equal to one quarter of the wavelength of operation.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and further and more specific objects and advantages ofthe instant invention will become readily apparent to those skilled inthe art from the following detailed description of a preferredembodiment thereof taken in conjunction with the following drawings:

FIG. 1 is a sectional view of a step in the fabrication of a singlejunction vertical cavity surface emitting laser in accordance with thepresent invention;

FIG. 2 is a sectional view of a step in the fabrication of the singlejunction vertical cavity surface emitting laser in accordance with thepresent invention;

FIG. 3 is a sectional view of another step in the fabrication of thesingle junction vertical cavity surface emitting laser in accordancewith the present invention;

FIG. 4 is a sectional view of still another step in the fabrication ofthe single junction vertical cavity surface emitting laser in accordancewith the present invention;

FIG. 5 is a sectional view of a step in the fabrication of the singlejunction vertical cavity surface emitting laser in accordance with thepresent invention;

FIG. 6 is a circuit schematic of an electro-optic circuit of the singlejunction vertical cavity surface emitting laser connected to electronicmodulation circuitry in accordance with the present invention.

FIG. 7 is a sectional view of a step in the fabrication of amulti-junction vertical cavity surface emitting laser in accordance withthe present invention;

FIG. 8 is a circuit schematic of an electrooptic circuit of themulti-junction vertical cavity surface emitting laser connected toelectronic modulation circuitry in accordance with the presentinvention;

FIG. 9 is a sectional view of another embodiment of a multi-junctionVCSEL in accordance with the present invention;

FIG. 10 is a sectional view of yet another embodiment of amulti-junction VCSEL in accordance with the present invention; and

FIG. 11 is a sectional view of still another embodiment of amulti-junction VCSEL in accordance with the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Turn now to FIG. 1 which illustrates a step in the fabrication of asingle junction vertical cavity surface emitting laser 5 with awavelength of operation in accordance with the present invention. Itwill be understood that we are illustrating a single VCSEL 5 althoughgenerally a plurality of VCSEL's are deposited or grown in blanketlayers over an entire wafer so that a large number of VCSEL's arefabricated simultaneously.

The method of fabricating single junction VCSEL 5 includes providing asubstrate 26 onto which at least one light emitting region 23 isepitaxially grown. In this embodiment, we are illustrating a singlelight emitting region 23 for simplicity and ease of discussion. In thepreferred embodiment, substrate 26 includes indium phosphide (InP).However, it will be understood that substrate 26 can include othermaterials, such as gallium aresenide (GaAs) or the like, which can belattice matched with subsequent layers grown thereon.

Light emitting region 23 includes an active region 21 with a pluralityof quantum structure layers 22 with a band gap wavelength wherein eachquantum structure layer 22 substantially emits light at the wavelengthof operation. In the preferred embodiment, the wavelength of operationis in a range given approximately from 1.2 μm to 1.6 μm which istypically used in optical communication applications, such as fiberoptical networks. However, it will be understood that other wavelengthranges may be suitable for a given application.

In the preferred embodiment, active region 21 is sandwiched between acladding layer 18 and a cladding layer 24. It will be understood thatwhile cladding layers 18 and 24 are illustrated as including a singlematerial layer, layers 18 and 24 can each include more than one layer.Further, in the preferred embodiment, cladding layers 18 and 24 includeindium phosphide wherein cladding layer 18 is lightly doped n-type andcladding layer 24 is lightly doped p-type. However, it will beunderstood that layers 18 and 24 can include other suitable claddingmaterials with various doping configurations.

In the preferred embodiment, quantum structure layers 22 include quantumwells. However, it will be understood that layers 22 can include otherdevice structures, such as quantum dots or similar device structureswith suitable light emission properties. In the preferred embodiment,each adjacent quantum structure layer 22 in active region 21 is spacedapart by a distance 11 chosen such that quantum structures layers 22 aresubstantially at an anti-node of an optical field in VCSEL 5 (i.e.distance 11 is approximately equal to one half the wavelength ofoperation or integer multiples thereof).

Further, adjacent quantum structure layers 22 are separated by a barrierlayer 20 as illustrated such that a barrier layer 20 a is positionedadjacent to cladding layer 24 and a barrier layer 20 b is positionedadjacent to cladding layer 18. In the preferred embodiment, an energygap wavelength of each barrier layer 20 is smaller than the energy gapwavelength of each quantum structure layer 22. Further, in the preferredembodiment, quantum structure layers 22 and barrier layers 20 includealloys of AlGaInAs (i.e. InAlAs, InGaAs, etc.). However, it will beunderstood that quantum structure layers 22 and barrier layers 20 caninclude other suitable light emitting materials and barrier materials,respectively.

It will be understood that in some embodiments, barrier layer 20 apositioned adjacent to cladding layer 24 can include a sufficiently lowelectron affinity material in order to provide improved electronconfinement for active region 21. Further, in some embodiments, barrierlayer 20 b adjacent to cladding layer 18 can include a sufficiently highionization potential material to provide improved hole confinement. Theaddition of barrier layers 20 a and 20 b provides a higher energybarrier against carrier leakage and carrier loss, and improves a hightemperature performance of VCSEL 5.

A contact region 19 is positioned on light emitting region 23 adjacentto cladding layer 18. In the preferred embodiment, contact region 19includes highly n-type doped indium phosphide (InP). However, it will beunderstood that contact region 19 can include other suitable contactmaterials. Further, contact region 19 is illustrated as including asingle layer for simplicity and illustrative purposes. However, it willbe understood that contact region 19 can include multiple conductivelayers.

A metamorphic DBR region 16 is epitaxially grown on contact region 19.In the preferred embodiment, metamorphic DBR region 16 includesalternate layers of an AlAs layer 15 and a GaAs layer 17. However, itwill be understood that layers 15 and 17 can include other suitablereflective materials that are stacked alternately between a high and alow index of refraction. Further, in the preferred embodiment, eachlayer 15 and 17 has a thickness 74 approximately equal to one quarter ofthe wavelength of operation to provide a desired reflective property.Metamorphic DBR region 16 behaves as a heat spreading region. The higherthermal conductivity of binary compounds in metamorphic DBR region 16provides a lower thermal resistance and better high temperatureperformance for single junction VCSEL 5.

A substrate 10 is bonded to metamorphic DBR region 16. In the preferredembodiment, substrate 10 includes indium phosphide (InP). However, itwill be understood that substrate 10 can include other suitablesubstrate materials, such as gallium arsenide (GaAs), silicon (Si), orother suitable supporting materials with a desired property for thermalconductivity, such as a heatsink or the like. Substrate 10 can be bondedto region 16 using techniques well known to those skilled in the art. Inthe preferred embodiment, substrate 10 is bonded to region 16 using abonding layer 12 which includes a solder material such as gold/silicon(Au/Si), gold/tin (Au/Sn), gold/germanium (AuGe), or the like. In thepreferred embodiment, bonding layer 12 includes a window 14 to allowlight emission from light emitting region 23 as will be discussedseparately.

Turn now to FIG. 2 which illustrates another step in the fabrication ofsingle junction VCSEL 5. In FIG. 2, substrate 26 is substantiallyremoved to expose a surface 46 of light emitting region 23 by anytechnique well known to those skilled in the art, such as lapping or thelike. Further, in the preferred embodiment an implant region 36 and 37are formed within cladding layer 24 and aligned such that anelectrically conductive channel is formed which substantially overlapsthe light path channel 49 that extends through light emitting region 23,metamorphic DBR region 16, and substrate 10, as will be discussedseparately. In the preferred embodiment, an index guide region 30 and 31are positioned within cladding layer 24 adjacent to surface 46 andaligned with window 14 and light path channel 49. Index guide regions 30and 31 can include, for example, a trench.

Implant regions 36 and 37 are used to substantially confine anelectrical current to light path channel 49 to improve a single modelasing operation. Hence, ion implantation is used to bombard some of thesurrounding cladding layer 24 in order to create a region of higherresistivity, and, thereby channel a substantial amount of the electricalcurrent into the relatively more conductive light path channel 49.However, it will be understood that implant regions 36 and 37 and indexguide regions 30 and 31 are optional, but included in the preferredembodiment for illustrative purposes.

The implanted ions may consist of singly-charged protons (H+),singley-charged helium ions (He⁺), doubly-charged helium ions (He⁺⁺), orthe like. The higher resistivity substantially results from the deeplevels created by the implant damage, whose energy states favor thecompensation of cladding region 24. It will be understood that a similarimplant region could be created within cladding layer 18 and adjacent tolight path channel 49.

Index guide regions 30 and 31 are used to improve a single-mode outputpower of single junction VCSEL 5 by increasing the lateral cross-sectionof the gain region while preserving single-mode lasing operation bymeans of mode selection measures (mode control) that preferentiallyenhance a modal gain of one mode through index guiding, or alternativelysuppress the other competing higher order modes through higherreflection loss. By allowing the actively pumped area to increase whilesuppressing the competing modes that emerge through surface reliefpatterning, higher single-mode output power is achieved through areduced current density, which leads to lower self-heating and reducedgain saturation.

Turn now to FIG. 3 which illustrates another step in the fabrication ofsingle junction VCSEL 5. In FIG. 3 and in the preferred embodiment, adielectric DBR region 28 is positioned on light emitting region 23 andadjacent to cladding region 24 by using a dielectric lift-off process.However, it will be understood that dielectric DBR region 28 can bedeposited using other deposition techniques well know to those skilledin the art. In the preferred embodiment, dielectric DBR region 28includes alternate layers of a silicon oxide (SiO) layer 25 and atitanium oxide (TiO) layer 27 wherein each layer 25 and 27 has thickness74 approximately equal to one quarter of the wavelength of operation toobtain a desired reflective property.

However, it will be understood that layers 25 and 27 can include othersuitable dielectric materials of alternate layers of a high dielectricconstant material and a low dielectric constant material, such asalternate layers of magnesium fluoride (MgF) and zinc selenide (ZnSe).Further, it will be understood that the use of a dielectric DBR regionin this embodiment is for illustrative purposes only. For example DBRregion 28 could include alternate layers of aluminum arsenide (AlAs) andgallium arsenide (GaAs) and be similar in structure to metamorphic DBRregion 16.

Turn now to FIG. 4 which illustrates another step in the fabrication ofsingle junction VCSEL 5. In FIG. 4, light emitting region 23 anddielectric DBR region 28 are etched through contact region 19 to form amesa 47 and expose a surface 70 and a surface 71. Further, dielectricDBR region 28 is etched through light emitting region 23 to form a mesa48 and expose a surface 72 and 73.

Turn now to FIG. 5 which illustrates another step in the fabrication ofsingle junction VCSEL 5. In FIG. 5, an electrical contact 35 and 33 aredeposited on surface 70 and 71, respectively. It will be understood thatelectrical contacts 33 and 35 can include gold (Au), platinum (Pt),silver (Ag), or the like. Further, it will be understood that whilecontact layers 33 and 35 are illustrated as including a single layer,layers 33 and 35 could include multiple conductive layers of conductivematerials.

In the preferred embodiment, a contact layer 42 and 43 are epitaxiallydeposited on surfaces 72 and 73, respectively. In the preferredembodiment, contact layers 42 and 43 include highly p-type doped InGaAs.However, it will be understood that layers 42 and 43 can include othersuitable conductive materials. Further, an electrical contact 34 ispositioned on contact layer 42 and an electrical contact 32 ispositioned on contact layer 43 to form a pn junction 44 betweenelectrical contacts 70 and/or 71 and electrical contacts 32 and/or 34 asillustrated wherein pn junction 44 emits light 38 and light 39.

It will be understood that electrical contacts 32 and 34 can includegold (Au), platinum (Pt), silver (Ag), or the like. It will also beunderstood that in the preferred embodiment, layers 42, 43, and 24 arep-type doped and layers 19 and 18 are n-type doped for illustrativepurposes and that other doping configurations are possible. For example,layers 42, 43, and 24 could be n-type doped and layers 19 and 18 couldbe p-type doped wherein a polarity of pn junction 44 is reversed.

Turn now to FIG. 6 which illustrates an electrooptic circuit 60 ofsingle junction VCSEL 5 connected to electronic modulation circuitry. Incircuit 60, electrical contacts 33 and 35 (See FIG. 5) are electricallyconnected to an electrical power return 61. Further, electrical contacts32 and 34 (See FIG. 5) are electrically connected to a terminal of aresistor 66. An opposed terminal of resistor 66 is electricallyconnected to a terminal of a capacitor 62 and a terminal of an inductor64, as in a “bias tee”. An opposed terminal of capacitor 62 iselectrically connected to an RF power source 63. An opposed terminal ofinductor 64 is electrically connected to a DC power source 65. It willbe understood that electrooptic circuit 60 could be formed as anintegrated circuit or could include a combination of integrated anddiscrete electronic components.

In circuit 60, DC power source 65 biases pn junction 44 with a DCvoltage. Inductor 64 provides an electrical short for DC signals and ahigh impedance to RF signals. Resistor 66 added in series with diode 44behaves as a current limiter or an impedance matching element, andcapacitor 62 isolates RF power source 63 from a DC current. RF powersource 63 provides an RF voltage which modulates pn junction 44.

It is highly desirable to form a plurality of light emitting regions 23to enhance light emission. Further, it is desirable to increase lightemission without dramatically increasing power consumption and thegeneration of heat. To accomplish these objects, a multi-junction VCSELis formed in which light emitting regions are biased in a parallelmanner in order to achieve low bias voltage operation and minimal heatgeneration.

Turn now to FIG. 7 which illustrates a multijunction VCSEL 7′ with awavelength of operation configured to allow improved light emission withlower power consumption. It will be understood that multijunction VCSEL7′ is fabricated using similar steps in the fabrication sequence forsingle junction VCSEL 5 (i.e. substrate bonding, substrate removal,etc.). However, we are illustrating the final device structure in FIG. 7for simplicity and ease of discussion. Further, multijunction VCSEL 7′includes two active regions for simplicity and ease of discussion.However, it will be understood that multijunction VCSEL 7′ can includemore than two light emitting regions electrically connected in parallel.

Multijunction VCSEL 7′ includes a substrate 10′. In the preferredembodiment, substrate 10′ includes indium phosphide (InP). However, itwill be understood that substrate 10′ can include other suitablesubstrate materials, such as gallium arsenide (GaAs), silicon (Si), orother suitable supporting materials with the desired properties forthermal conductivity, such as a heatsink or the like. In the preferredembodiment, substrate 10′ is bonded to region 16′ using a bonding layer12′ which includes solder such as gold/silicon (Au/Si), gold/tin(Au/Sn), gold/germanium (Au/Ge), or the like. Bonding layer 12′ includesa window 14′ to allow light emission from an active regions 21′ and 29′as will be discussed separately.

In the preferred embodiment, metamorphic DBR region 16′ includesalternate layers of an AlAs layer 15′ and a GaAs layer 17′ wherein eachlayer 15′ and 17′ has a thickness 74′ approximately equal to one quarterof the wavelength of operation to obtain a desired reflective property.However, it will be understood that layers 15′ and 17′ can include othersuitable reflective materials that are stacked alternately between ahigh and a low index of refraction. Metamorphic DBR region 16′ behavesas a heat spreading region. The higher thermal conductivity of binarycompounds in metamorphic DBR region 16′ provide a lower thermalresistance and better high temperature performance for multijunctionVCSEL 7′.

A contact region 77′ is positioned on metamorphic DBR region 16′. In thepreferred embodiment, contact region 77′ includes highly n-type dopedInP. However, it will be understood that contact region 77′ can includeother suitable contact materials. Further, contact region 77′ isillustrated as including a single layer for simplicity and illustrativepurposes. However, it will be understood that contact region 77′ caninclude multiple conductive layers.

A light emitting region 53′ is positioned on contact layer 77′. Lightemitting region 53′ includes active region 29′ with a plurality ofquantum structure layers 52′ with a band gap wavelength wherein eachquantum structure layer 52′ substantially emits light at the wavelengthof operation. In the preferred embodiment, the wavelength of operationis in a range given approximately from 1.2 μm to 1.6 μm which istypically used in optical communication applications, such as fiberoptical networks. However, it will be understood that other wavelengthranges may be suitable for a given application.

In the preferred embodiment, active region 29′ is sandwiched between acladding layer 55′ and a cladding layer 54′. It will be understood thatwhile cladding layers 54′ and 55′ are illustrated as including a singlematerial layer, layers 54′ and 55′ can each include more than one layer.Further, in the preferred embodiment, cladding layers 54′ and 55′include indium phosphide wherein cladding layer 54′ is lightly dopedn-type and cladding layer 55′ is lightly doped p-type. However, it willbe understood that layers 54′ and 55′ can include other suitablecladding materials with various doping configurations.

In the preferred embodiment, quantum structure layers 52′ includequantum wells. However, it will be understood that layers 52′ caninclude other device structures, such as quantum dots or similar devicestructures with suitable light emission properties. In the preferredembodiment, each adjacent quantum structure layer 52′ in active region29′ is spaced apart by a distance 11′ chosen such that quantumstructures layers 52′ are substantially at an anti-node of an opticalfield in VCSEL 5 (i.e. distance 11′ is approximately equal to one halfthe wavelength of operation or integer multiples thereof).

Further, adjacent quantum structure layers 52′ are separated by abarrier layer 50′ as illustrated such that a barrier layer 50′a and 50′bis positioned adjacent to cladding layers 55′ and 54′, respectively. Inthe preferred embodiment, an energy gap wavelength of each barrier layer50′ is smaller than the energy gap wavelength of each quantum structurelayer 52′. Further, in the preferred embodiment, quantum structurelayers 52′ and barrier layers 50′ include alloys of AlGaInAs (i.e.InAlAs, InGaAs, etc.). However, it will be understood that quantumstructure layers 52′ and barrier layers 50′ can include other suitablelight emitting materials and barrier materials, respectively.

It will be understood that in some embodiments, barrier layer 50′apositioned adjacent to cladding layer 55′ can include a sufficiently lowelectron affinity material in order to provide improved electronconfinement for active region 29′. Further, in some embodiments, barrierlayer 50′b adjacent to cladding layer 54′ can include a sufficientlyhigh ionization potential material to provide improved hole confinement.The addition of barrier layers 50′a and 50′b provides a higher energybarrier against carrier leakage and carrier loss, and improves a hightemperature performance of VCSEL 5.

A contact region 19′ is positioned on light emitting region 53′. Contactregion 19′ includes a contact layer 40′ positioned on cladding layer 54′and a contact layer 41′ positioned on contact layer 40′. However, itwill be understood that contact region 19′ can include a number oflayers greater than one with various doping configurations. In thepreferred embodiment, contact layer 40′ includes p-type doped indiumphosphide (InP) and contact layer 41′ includes p-type doped aluminumgallium indium arsenide (AlGaInAs) wherein the doping concentration ofcontact layer 41′ is substantially greater than the doping concentrationof contact layer 40′.

A light emitting region 23′ is positioned on contact region 19′. Lightemitting region 23′ includes active region 21′ with a plurality ofquantum structure layers 22′ with a band gap wavelength wherein eachquantum structure layer 22′ substantially emits light at the wavelengthof operation.

In the preferred embodiment, active region 21′ is sandwiched between acladding layer 18′ and a cladding layer 24′. It will be understood thatwhile cladding layers 18′ and 24′ are illustrated as including a singlematerial layer, layers 18′ and 24′ can each include more than one layer.Further, in the preferred embodiment, cladding layers 18′ and 24′include indium phosphide wherein cladding layer 18′ is lightly dopedn-type and cladding layer 24′ is lightly doped p-type. However, it willbe understood that layers 18′ and 24′ can include other suitablecladding materials with various doping configurations.

In the preferred embodiment, quantum structure layers 22′ includequantum wells. However, it will be understood that layers 22′ caninclude other device structures, such as quantum dots or similar devicestructures with suitable light emission properties. In the preferredembodiment, each adjacent quantum structure layer 22′ in active region21′ is spaced apart by distance 11′ chosen such that quantum structurelayers 22′ are substantially at an anti-node of an optical field inVCSEL 7′ (i.e. distance 11′ is approximately equal to one half thewavelength of operation or integer multiples thereof).

Further, adjacent quantum structure layers 22′ are separated by abarrier layer 20′ as illustrated such that a barrier layer 20 a ispositioned adjacent to cladding layer 24′ and a barrier layer 20 b ispositioned adjacent to cladding layer 18′. In the preferred embodiment,an energy gap wavelength of each barrier layer 20′ is smaller than theenergy gap wavelength of each quantum structure layer 22′. Further, inthe preferred embodiment, quantum structure layers 22′ and barrierlayers 20′ include AlGaInAs. However, it will be understood that quantumstructure layers 22′ and barrier layers 20′ can include alloys ofAlGaInAs or other suitable light emitting materials and barriermaterials, respectively.

It will be understood that in some embodiments, barrier layer 20′apositioned adjacent to cladding layer 24′ can include a sufficiently lowelectron affinity material in order to provide improved electronconfinement for active region 21′. Further, in some embodiments, barrierlayer 20′b adjacent to cladding layer 18′ can include a sufficientlyhigh ionization potential material to provide improved hole confinement.The addition of barrier layers 20′a and 20′b provides a higher energybarrier against carrier leakage and carrier loss, and improves a hightemperature performance of VCSEL 7′.

In the preferred embodiment, a dielectric DBR region 28′ is positionedon light emitting region 23′ and adjacent to cladding region 24′ byusing a dielectric lift-off process. However, it will be understood thatdielectric DBR region 28′ can be deposited using other depositiontechniques well known to those skilled in the art. In the preferredembodiment, dielectric DBR region 28′ includes alternate layers of asilicon oxide (SiO) layer 25′ and a titanium oxide (TiO) layer 27′wherein each layer 25′ and 27′ has thickness 74′ approximately equal toone quarter of the wavelength of operation to obtain a desiredreflective property.

However, it will be understood that layers 25′ and 27′ can include othersuitable dielectric materials which alternate between a high dielectricconstant material and a low dielectric constant material, such asalternate layers of magnesium fluoride (MgF) and zinc selenide (ZnSe).Further, it will be understood that the use of a dielectric DBR regionin this embodiment is for illustrative purposes only. For example DBRregion 28′ could include alternate layers of aluminum arsenide (AlAs)and gallium arsenide (GaAs) and be similar in structure to metamorphicDBR region 16′.

An implant region 36′ and 37′ are formed within cladding layer 24′ andan implant region 56′ and 57′ are formed within cladding layer 55′ andaligned such that a light path channel 49′ extends through dielectricDBR region 28′, light emitting region 23′, light emitting region 53′,metamorphic DBR region 16′, and substrate 10′, as will be discussedseparately. An index guide region 30′ and 31′ are positioned withincladding layer 24′ adjacent to a surface 46′ and aligned with window 14′and light path channel 49′. Index guide regions 30′ and 31′ can include,for example, a trench. Further, it will be understood that implantregions similar to regions 36′, 37′, 56′, and 57′ can be formed withincladding layers 54′ and/or 18′. However, the formation of implantregions within cladding layers 24′ and 55′ is for illustrative purposesonly.

Implant regions 36′, 37′, 56′, and 57′ are used to confine an electricalcurrent to light path channel 49′ to improve a single mode lasingoperation. Hence, ion implantation is used to bombard some of thesurrounding cladding layers 24′ and 55′ in order to create a region ofhigher resistivity, and, thereby channel most of the electrical currentinto the relatively more conductive light path channel 49′. Theimplanted ions may consist of singly-charged protons (H⁺),singly-charged or doubly-charged helium ions (He⁺ or He⁺⁺), or the like.The higher resistivity substantially results from the deep levelscreated by the implant damage, whose energy states favor thecompensation of cladding layers 24′ and 55′.

Index guide regions 30′ and 31′ are used to improve a single-mode outputpower of single junction VCSEL 7′ by increasing the lateralcross-section of the gain region while preserving single-mode lasingoperation by means of mode selection measures (mode control) thatpreferentially enhance the modal gain of one mode through index guiding,or alternatively suppress the other competing higher order modes througha higher reflection loss.

By allowing the actively pumped area to increase while suppressing thecompeting modes that emerge through surface relief patterning, highersingle-mode output power is achieved through a reduced current density,which leads to lower self-heating and reduced gain saturation.

In the preferred embodiment, dielectric DBR region 28′ is etched throughlight emitting region 23′ to form a mesa 48′ and expose a surface 72′and 73′. Further, in the preferred embodiment, light emitting region 23′is etched through contact region 19′ emitting region 53′ to form a mesa47′ and expose a surface 70′ and 71′. In the preferred embodiment, lightemitting region 53′ is etched through contact region 77′ to form a mesa51′ and expose a surface 75′ and 76′.

In the preferred embodiment, an electrical contact 58′ and 59′ arepositioned on surfaces 76′ and 75′, respectively. It will be understoodthat electrical contacts 58′ and 59′ can include gold (Au), platinum(Pt), silver (Ag), or the like. Further, it will be understood thatcontact layers 58′ and 59′ are illustrated as including a single layer,but layers 58′ and 59′ could include multiple conductive layers of aconductive material.

In the preferred embodiment, an electrical contact 35′ and 33′ arepositioned on surfaces 70′ and 71′, respectively. It will be understoodthat electrical contacts 33′ and 35′ can include gold (Au), platinum(Pt), silver (Ag), or the like. Further, it will be understood thatcontact layers 33′ and 35′ are illustrated as including a single, layer,but layers 33′ and 35′ could include multiple conductive layers of aconductive material.

In the preferred embodiment, contact layers 42′ and 43′ are epitaxiallydeposited on surfaces 72′ and 73′, respectively. In the preferredembodiment, contact layers 42′ and 43′ include highly p-type dopedInGaAs. However, it will be understood that layers 42′ and 43′ caninclude other suitable conductive materials. Further, an electricalcontact 34′ is positioned on contact layer 42′ and an electrical contact32′ is positioned on contact layer 43′ to form a pn junction 44′ betweenelectrical contacts 33′ and/or 35′ and electrical contacts 32′ and/or34′ as illustrated. Further, a pn junction 45′ is formed betweenelectrical contacts 33′ and/or 35′ and electrical contacts 58′ and/or59′.

It will be understood that electrical contacts 32′ and 34′ can includegold (Au), platinum (Pt), silver (Ag), or the like. Further, it will beunderstood that in the preferred embodiment, layers 42′ and 43′ aren-type doped, region 19′ is p-type doped, and layer 49′ is n-type dopedfor illustrative purposes and that other doping configurations arepossible. For example, layers 42′ and 43′ could be p-type doped, layer.19′ could be n-type doped, and layer 49′ could be p-type doped wherein apolarity of pn junctions 44′ and 45′ is reversed.

In the preferred embodiment, active regions 21′ and 29′ are opticallycascaded in a resonant configuration to increase the overalloptical-gain and to achieve high optical output power. However, pnjunctions 44′ and 45′ are electrically biased in parallel to minimizethe voltage required to operate multijunction VCSEL 70′, as will bediscussed presently. Further, in the preferred embodiment, light pathchannel 49′ is defined such that a current path through active region53′ is substantially equal to a current path through active region 23′such that each active region 23′ and 53′ emits a substantially equalamount of light. It will be understood that a current path can beadjusted by changing the properties and positioning of implant regions36′, 37′, 56′, or 57′, as well as index guides 30 and 31.

Turn now to FIG. 8 which illustrates an electrooptic circuit 80′ ofmultijunction VCSEL 7′ connected to electronic modulation circuitry. ADC power input 94′ is electrically connected to a terminal of aninductor 92′. An opposed terminal of inductor 92′ is electricallyconnected to a terminal of a capacitor 96′ and a terminal of a resistor93′. An opposed terminal of capacitor 96′ is electrically connected toan RF power source 98′. An opposed terminal of resistor 93′ iselectrically connected to electrical contacts 32′ and/or 34′ (See FIG.7) of multijunction VCSEL 7′. Further, a DC power return 88′ iselectrically connected to electrical contact 33′ and/or 35′ (See FIG.7).

Electrical contacts 58′ and/or 59′ (See FIG. 7) of multijunction VCSEL7′ are electrically connected to a terminal of a resistor 85′. Anopposed terminal of resistor 85′ is electrically connected to a terminalof an inductor 84′ and a terminal of a capacitor 90′. An opposedterminal of inductor 84′ is electrically connected to a DC power input86′ and an opposed terminal of capacitor 90′ is electrically connectedto an RF power return 82′.

In electrooptic circuit 80′, DC power source 86′ biases pn junction 45′with a DC voltage and DC power source 94′ biases pn junction 44′ with aDC voltage. Inductors 84′ and 92′ provide an electrical short for DCsignals and a high impedance for RF signals, while capacitors 90′ and96′ isolate RF power return 82′ and RF power source 98′, respectively,from a DC current. Resistors 93′ and 85′ are added as current limitersand also for impedance matching when needed. RF power source 98′provides an RF voltage which modulates pn junction 44′.

Turning back to FIG. 7, active regions 21′ and 29′ are positioned withina resonance cavity 81′ defined by metamorphic DBR mirror 16′ anddielectric DBR mirror 28′. Active regions 21′ and 29′ are located at theantinodes of the optical field within resonance cavity 81′ and emitlight coherently, wherein each active region 21′ and 29′ contributessubstantially to the overall optical gain of VCSEL 7′. PN junctions 44′and 45′ are connected serially but are biased in parallel. Each pnjunction 44′ and 45′ is biased by DC bias 94′ and 86′, respectively, toproduce an optical gain that combines coherently to bias VCSEL 7′ inclose proximity to a lasing threshold. RF signal 98′ supplies amodulation signal to junction 44′, which functions as a “gain lever”that modulates the gain of VCSEL 7′ above threshold and produces amodulated optical output.

In order to increase the power output of multijunction VCSEL 7′, pnjunctions 44′ and 45′ are optically cascaded within common opticalresonance cavity 81′ defined by metamorphic DBR region 16′ anddielectric DBR region 28′. Placing quantum structure layers 22′ and 52′at the peaks (anti-nodes) of the optical field causes the optical gainsof active regions 21′ and 29′ to be coherently coupled, therebyincreasing the overall gain of the cavity and increasing the poweroutput.

In the preferred embodiment, active regions 21′ and 29′ are placed atdifferent antinodes within the same resonance cavity, and each gainsection is electrically biased individually within pn junction 44′ and45′, respectively. In the preferred embodiment, pn junctions 44′ and 45′are biased not in serial, but in parallel by sharing a common p⁺electrode (i.e. contact region 19′).

In this three-terminal configuration, both pn junctions 44′ and 45′ areindependently forward-biased by different currents through separatecurrent paths, whose sum constitutes the total drive current. Theforward-biased voltages of pn junctions 44′ and 45′ are each comparableto that of a single pn junction. Each current contributes a loweroptical gain to the shared resonance cavity, while the collectiveoptical gain determines the threshold lasing condition of the cavity.

In the preferred embodiment of multijunction VCSEL 7′, pn junction 45′is subjected only to a DC bias, while pn junction 44′ (which issubstantially similar in area) is subjected to both a DC bias and a RFmodulation current for high-speed operation. In this manner both pnjunctions 44′ and 45′ are subjected to lower voltage biases and lowercurrent injection levels, and are, thus, less prone to gain saturation.

Turn now to FIG. 9 which illustrates another embodiment of amultijunction VCSEL 8′. It will be understood that multijunction VCSEL8′ is fabricated using similar steps in the fabrication sequence formultijunction VCSEL 7′ (i.e. substrate bonding, substrate removal, etc.)and includes similar layers. However, we are illustrating the finaldevice structure in FIG. 9 for simplicity and ease of discussion.Further, multijunction VCSEL 8′ includes two active regions forsimplicity and ease of discussion. However, it will be understood thatmultijunction VCSEL 8′ can include more than two light emitting regionselectrically connected in parallel.

In this embodiment, metamorphic DBR 16′ is patterned into aself-enclosed etched trench 187′ with a surface 188′ which providesdirect electrical access to contact region 77′ and also providesimproved carrier confinement, as will be discussed presently. In thepreferred embodiment, etched trench 187′ also allows cladding region 54′(or cladding region 55′) to be ion implanted through bottom surface 188′in a direction 182′ substantially opposite to an ion implant in adirection 186′ in cladding region 24′. In the preferred embodiment, theions implanted in direction 186′ form implant regions 36′ and 37′ incladding region 24′ and the ions implanted in direction 182′ formimplant regions 56′ and 57′ in contact region 54′. This allows lightemitting regions 23′ and 53′ to be implanted independently withoutsubstantially damaging contact region 19′.

In the preferred embodiment, after ion implantation and annealing, abase metal layer 183′ is deposited over metamorphic DBR 16′. In thepreferred embodiment, base metal layer 183′ is used as a seed layer forelectroplating a contact layer 180′ that has a substantially planarizedbottom surface 189′. It will be understood that layers 183′ and 189′ caninclude gold (Au), platinum (Pt), or the like. Further, it will beunderstood that base metal layer 181′ and contact layer 180′ can bedeposited using other deposition techniques well known to those skilledin the art. In the preferred embodiment, contact layer 180′ is thenbonded to substrate 10′ by using bonding layer 12′.

Multijunction VCSEL 8′ has a lower spreading resistance which issubstantially obtained through improved current confinement by formingtrench 187′ within metamorphic DBR 16′. The lower spreading resistanceis also improved by forming implant regions 56′ and 57′ in claddingregion 54′ and implant regions 36′ and 37′ in cladding region 24′without substantially damaging contact region 19′. These improvementsallow the current to be substantially injected through contact region77′ toward contact layers 42′ and 43′ and minimizes a lateral currentspreading.

An alternative means to ion implantation for current confinement is toselectively undercut active regions 21′ and 29′ to form a currentaperture in a multijunction VCSEL 6′, as illustrated in FIG. 10, or toselectively undercut a portion of cladding regions 24′, 18′, 54′, or 55′in a multijunction VCSEL 9′, as illustrated in FIG. 11. It will beunderstood that multijunction VCSEL's 6′ and 9′ are fabricated usingsimilar steps in the fabrication sequence for multijunction VCSEL 7′(i.e. substrate bonding, substrate removal, etc.) and include similarlayers. However, we are illustrating the final device structure in FIGS.10 and 11 for simplicity and ease of discussion. Further, multijunctionVCSEL's 6′ and 9′ include two active regions for simplicity and ease ofdiscussion. However, it will be understood that multijunction VCSEL's 6′and 9′ can include more than two light emitting regions electricallyconnected in parallel.

In the preferred embodiment, the undercutting is facilitated by dryetching a pattern of narrow trenches 184′ through light emitting regions23′ and 53′. An undercut trench 185′ can then be formed in active region21′ and/or active region 29′ (See FIG. 10). Undercut trench 185′ canalso be formed in at least one of cladding region 55′, 54′, 18′, and 24′(See FIG. 11). Further, in some embodiments, implant region 184′ andimplant region 183′ can be formed proximate to trench 184′, asillustrated in FIGS. 10 and 11, to provide further carrier confinement.

While the steps of the fabrication methods have been described, and willbe claimed, in a specific order, it will be clear to those skilled inthe art that various steps and procedures may be performed in adifferent order. It is intended, therefore, that the specific orderdescribed or claimed for the various fabrication steps does not in anywas limit the invention and any variations in order that still comewithin the scope of the invention are intended to be covered in theclaims.

Various changes and modifications to the embodiments herein chosen forpurposes of illustration will readily occur to those skilled in the art.To the extent that such modifications and variations do not depart fromthe spirit of the invention, they are intended to be included within thescope thereof which is assessed only by a fair interpretation of thefollowing claims.

Having fully described the invention in such clear and concise terms asto enable those skilled in the art to understand and practice the same,the invention claimed is:

1-72. (Canceled)
 73. An optical device with a wavelength of operation,the device comprising: a light emitting region which emits light at thewavelength of operation, the light emitting region including an activeregion and a contact region of a first conductivity type and a secondconductivity type wherein the light emitting region is positioned withinan optical gain cavity which includes a mirror and an opposed mirror;and a substrate solder bonded using a bonding layer to at least one ofthe mirror and the opposed mirror.
 74. An apparatus as claimed in claim73 wherein the substrate includes at least one of indium phosphide(InP), gallium arsenide (GaAs), silicon (Si), and another suitablesubstrate material which has suitable thermally conductive andsupporting properties.
 75. An apparatus as claimed in claim 73 whereinat least one of the mirror and the opposed mirror include ametamorphically grown distributed Bragg reflector which includes analloy of AlGaAs.
 76. An apparatus as claimed in claim 73 wherein atleast one of the mirror and the opposed mirror include a distributedBragg reflector which includes alternate layers of silicon oxide (SiO)and titanium oxide (TiO).
 77. An apparatus as claimed in claim 73wherein at least one of the mirror and the opposed mirror include adistributed Bragg reflector which includes alternate layers of magnesiumfluoride (MgF) and zinc selenide (ZnSe).
 78. An apparatus as claimed inclaim 73 wherein the active region includes a plurality of quantumstructures with a bandgap wavelength substantially equal to thewavelength of operation, wherein the plurality of quantum structuresinclude at least one of quantum wells, quantum dots, and another similarquantum structure which enhances light emission.
 79. An apparatus asclaimed in claim 78 wherein each quantum structure is positioned betweenquantum barrier layers wherein each quantum barrier layer has a bandgapwavelength smaller than the bandgap wavelength of the quantum structurelayers.
 80. An apparatus as claimed in claim 78 wherein each adjacentquantum structure of the plurality of quantum structures in the activeregion is spaced apart such that constructive interference occursbetween each adjacent quantum structure.
 81. An apparatus as claimed inclaim 73 wherein at least one of the mirror and the opposed mirrorinclude alloys of aluminum gallium arsenide (AlGaAs) which arecontinuously graded in composition to form continuously gradedheterointerfaces.
 82. An apparatus as claimed in claim 73 wherein aportion of the light emitting region is isolation implanted with atleast one of hydrogen ions (H⁺), helium ions (He⁺ or He⁺⁺), and anothersuitable ion to form a light path channel which extends from the mirrorto the opposed mirror.
 83. An apparatus as claimed in claim 73 whereinthe wavelength of operation is within a range given approximately from1.2 μm to 1.6 μm.
 84. An apparatus as claimed in claim 73 wherein thebonding layer includes at least one of gold/silicon (Au/Si), gold/tin(Au/Sn), gold/germanium (Au/Ge), or another suitable solder materialwith a desired property for adhesion.
 85. An apparatus as claimed inclaim 84 wherein the bonding layer includes a window to allowsubstantial light emission through the substrate.
 86. An apparatus asclaimed in claim 73 wherein at least one contact region of at least oneof the first and second conductivity types includes at least two layersof the same conductivity type and a substantially different dopingconcentration.
 87. An apparatus as claimed in claim 73 wherein a trenchis formed within one of the mirror and the opposed mirror and adjacentto a light path region and the substrate wherein the trench forms an ionimplantation path and provides substantial current confinement.
 88. Anapparatus as claimed in claim 87 wherein the trench includes a metalcontact region positioned therein, the metal contact region beingpositioned adjacent to the substrate and electrically connected to oneof the contact region of the first and second conductivity type.
 89. Anoptical device with a wavelength of operation, the device comprising: alight emitting region which emits light at the wavelength of operation,the light emitting region including an active region with a plurality ofquantum structure layers and a contact region of a first conductivitytype and a second conductivity type such that the light emitting regionis sandwiched between contact regions of opposite conductivity types; afirst stack of alternate layers of a first material with a first indexof refraction and a second material with a second index of refraction,the first stack of alternate layers being positioned on the lightemitting region wherein the first index of refraction is substantiallydifferent from the second index of refraction so that the first stack ofalternate layers forms a first mirror; a substrate solder bonded to thefirst stack of alternate layers; and a second stack of alternate layersof a third material with a third index of refraction and a fourthmaterial with a fourth index of refraction positioned on the lightemitting region wherein the third index of refraction is substantiallydifferent from the fourth index of refraction so that the second stackof alternate layers forms a second mirror.
 90. An apparatus as claimedin claim 89 wherein the substrate includes at least one of indiumphosphide (InP), gallium arsenide (GaAs), silicon (Si), and anothersuitable substrate material which has suitable thermally conductive andsupporting properties.
 91. An apparatus as claimed in claim 89 whereinat least one of the first and second stack of alternate layers includealternate layers of silicon oxide (SiO) and titanium oxide (TiO) andwherein each layer in the alternate layers has a thickness approximatelyequal to one quarter of the wavelength of operation.
 92. An apparatus asclaimed in claim 89 wherein at least one of the first and second stackof alternate layers include alternate layers of magnesium fluoride (MgF)and zinc selenide (ZnSe) and wherein each layer in the alternate layershas a thickness approximately equal to one quarter of the wavelength ofoperation.
 93. An apparatus as claimed in claim 89 wherein each adjacentquantum structure of the plurality of quantum structures in the activeregion is spaced apart such that constructive interference occursbetween each adjacent quantum structure.
 94. An apparatus as claimed inclaim 89 wherein the substrate is solder bonded using a bonding layerwhich includes at least one of gold/silicon (Au/Si), gold/tin (Au/Sn),gold/germanium (Au/Ge), or another suitable solder material with adesired property for adhesion.
 95. An apparatus as claimed in claim 94wherein the bonding layer includes a window to allow substantial lightemission through the second substrate.
 96. A multijunction laser with awavelength of operation, the laser comprising: a light emitting regionwhich substantially emits light at the wavelength of operation, thelight emitting region being positioned within an optical gain cavitywhich includes a mirror and an opposed mirror wherein the light emittingregion includes at least two active regions wherein each active regionis separated by alternate contact regions of a first conductivity typeand a second conductivity type such that each active region has aseparate direct current path.
 97. An apparatus as claimed in claim 96wherein each active region is formed between a first cladding region anda second cladding region.
 98. An apparatus as claimed in claim 96wherein the substrate includes at least one of indium phosphide (InP),gallium arsenide (GaAs), silicon (Si), and another suitable substratematerial which has suitable thermally conductive properties.
 99. Anapparatus as claimed in claim 96 wherein at least one of the first andsecond stack of alternate layers include an alloy of AlGaAs and whereineach layer of the first, second, third, and fourth material has athickness approximately equal to one quarter of the wavelength ofoperation.
 100. An apparatus as claimed in claim 96 wherein at least oneof the first and second stack of alternate layers include alternatelayers of silicon oxide (SiO) and titanium oxide (TiO) and wherein eachlayer has a thickness approximately equal to one quarter of thewavelength of operation.
 101. An apparatus as claimed in claim 96wherein at least one of the first and second stack of alternate layersinclude alternate layers of magnesium fluoride (MgF) and zinc selenide(ZnSe) and wherein each layer has a thickness approximately equal to onequarter of the wavelength of operation.
 102. An apparatus as claimed inclaim 96 wherein at least one of the first and second stack of alternatelayers include alloys of AlGaAs which are continuously graded incomposition to form continuously graded heterointerfaces.
 103. Anapparatus as claimed in claim 96 wherein at least a portion of one ofthe first and second cladding regions is isolation implanted with atleast one of hydrogen ions (H⁺), helium ions (He⁺ or He⁺⁺), and anothersuitable ion to form a light path channel which extends from the firststack of alternate layers to the second stack of alternate layers. 104.An apparatus as claimed in claim 96 wherein a plurality of index guideregions are formed adjacent to the second stack of alternate layers toform a light path channel.
 105. An apparatus as claimed in claim 96wherein each active region includes a plurality of quantum structureswherein each adjacent quantum structure is spaced apart such thatconstructive interference occurs between each adjacent quantumstructure.
 106. An apparatus as claimed in claim 96 wherein thewavelength of operation is within a range given approximately from 1.2μm to 1.6 μm.
 107. An apparatus as claimed in claim 96 wherein thesubstrate is solder bonded using a bonding layer which includes at leastone of gold/silicon (Au/Si), gold/tin (Au/Sn), gold/germanium (Au/Ge),or another suitable solder material with a desired property foradhesion.
 108. An apparatus as claimed in claim 107 wherein the bondinglayer includes a window to allow a substantial light emission throughthe second substrate.
 109. An apparatus as claimed in claim 96 whereinat least one contact region includes at least two layers of the sameconductivity type and substantially different doping concentrations.110. An apparatus as claimed in claim 96 wherein each adjacent activeregion in the at least two active regions includes a substantially equalcurrent path such that each active region emits a substantially equalamount of light.
 111. An apparatus as claimed in claim 96 wherein eachcontact region in the alternate contact regions includes a substantiallyequal current path between each adjacent contact region.
 112. Amultijunction laser with a wavelength of operation, the lasercomprising: a light emitting region which substantially emits light atthe wavelength of operation positioned within an optical gain cavitywherein the light emitting region includes a plurality of active regionsand wherein each active region is separated by alternate contact regionsof a first conductivity type and a second conductivity type.
 113. Anapparatus as claimed in claim 111 wherein the multijunction verticalcavity surface emitting laser is one of electrically and opticallypumped such that light emitted from each active region is resonant withlight emitted from each adjacent active region.